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 DA1017.002 29 May, 2002
MAS1017
AM Receiver IC
* High Sensitivity * Very Low Power Consumption * Wide Supply Voltage Range * Power Down and Power Up Control * High Selectivity by Crystal Filter
DESCRIPTION
The MAS1017 AM-Receiver chip is a highly sensitive, simple to use AM receiver specially intended to receive time signals in the frequency range from 40 kHz to 100 kHz. There are only a few external components needed. The circuit has a preamplifier, wide range automatic gain control, demodulator and output comparator built in. The output signal can be processed directly with an additional digital circuitry to extract the data from the received signal.
FEATURES
* * * * * * * Highly Sensitive AM Receiver Wide Supply Voltage Range Very Low Power Consumption Power Down and Power Up Control Only a Few External Components Needed Wide Frequency Range from 40 kHz to 100 kHz High Selectivity by Quartz Crystal Filter
APPLICATIONS
* Time Signal Receiver for DCF77 (Germany)
BLOCK DIAGRAM
QO QI
RFI
AGC Amplifier
Demodulator & Comparator
DCF
Power Supply/Biasing
VDD
VSS
PDN
PUP
AGC
DEC
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DA1017.002 29 May, 2002
PAD LAYOUT
1588 m
VSS RFI PDN QO
MAS1017
QI
2094 m
VDD DEC AGC PUP DCF
DIE size = 2.09 x 1.59 mm; PAD size = 100 x 100 m Substrate is connected to VDD. Please make sure that VDD is bonded first. Note: Coordinates are calculated using VDD as a centre point. Pad Identification Power Supply Voltage Demodulator Capacitor AGC Capacitor Power Up Input DCF Signal Output Quarz Filter Input Quarz Filter Output Power Down Input Receiver Input Power Supply Ground Name VDD DEC AGC PUP DCF QI QO PDN RFI VSS X-coordinate 0 m 244 m 520 m 759 m 1075 m 1038 m 760 m 483 m 243 m -15 m Y-coordinate 0 m 8 m 8 m 8 m 8 m 1625 m 1625 m 1625 m 1625 m 1605 m Note
1 2
3
Notes: 1) See power down control table below. - Internal pull-down resistor > 1 M to VSS 2) DCF = VSS when carrier amplitude at maximum; DCF = VDD when carrier amplitude is reduced (25% modulated) - the output is a current source/sink with |IOUT| > 5 A - at power down the output is high impedance 3) See power down control logic table below. - Internal pull-up resistor > 1M to VDD PDN VSS VSS VDD VDD PUP VSS VDD VSS VDD Power Down NO NO YES (In power down if both PDN and PUP are left unconnected) NO
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DA1017.002 29 May, 2002
ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage Input Voltage Power Dissipation Operating Temperature Storage Temperature Symbol VDD-VSS VIN PMAX TOP TST Conditions Min -0.3 VSS-0.3 -20 -40 Max 5.0 VDD+0.3 100 70 120 Unit V V mW o C o C
ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 1.4V, Temperature = 25C
Parameter Operating Voltage Current Consumption Stand-By Current Input Range Sensitivity Input Levels |lIN|<0.5 A Output Current VOL<0.2 VDD;VOH >0.8 VDD Output Pulse Startup Time Output Delay Time
Symbol VDD IDD IDDoff fIN VIN VIL VIH |IOUT| T0 T1 TStart TDelay
Conditions
Min 1.10
Typ 40
Max 3.60 100 0.1 100 20 0.3
Unit V A A kHz mVrms V A
40 0.001 VDD - 0.3 5 50 150 8 50
140 230
ms ms s ms
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DA1017.002 29 May, 2002
TYPICAL APPLICATION
77503 Hz
QO FerriteAn tenna RFI AG C Am plifier
QI
Dem odulator & Com parator
DCF
Receiver output
Pow er Supply/Biasing VDD VSS PDN AG C 470 nF DEC 47 nF
PUP
+1.1V to +3.6V
Note 1: Ferrite Antenna and Crystal The crystal as well as ferrite antenna frequencies are chosen according to the time signal system frequency. DCF-77 transmitter frequency is 77.5 kHz. The ferrite antenna center frequency has to be tuned to 77.5 kHz. The optimal crystal frequency is 77503 Hz but also 77500 Hz crystal can be used. The shunt capacitance of the crystal should be as close as possible to internal shunt capacitance compensation capacitor of 0.75 pF for optimal noise filtering. Note 2: AGC and DEC Capacitors The AGC and DEC capacitors should have low leakage currents due to very small 40 nA signal currents through the capacitors. The insulation resistance of these capacitors should be higher than 70 M. Also probes with at least 100 M impedance should be used for voltage probing of AGC and DEC pins.
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DA1017.002 29 May, 2002
SAMPLES IN SBDIL 20 PACKAGE
NC 1 20 VSS 19 NC 18 RFI 17 PDN 16 NC 15 QO 14 NC 13 QI 12 NC 11 NC
VDD 2 NC 3
DEC 4 AGC NC 5 6
PUP 7 DCF 8 NC NC 9 10
PIN DESCRIPTION
Pin Name NC VDD NC DEC AGC NC PUP DCF NC NC NC NC QI NC QO NC PDN RFI NC VSS Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Type P AO AO AI DO Function Positive power supply Demodulator capacitor AGC capacitor Power up input Demodulator output 1 2 Note
AI AO AI AI G
Quartz filter input 3 Quartz filter output Power down input Receiver input Power supply ground 4
Notes: 1) See power down control table on page 2. - Internal pull-down resistor > 1 M to VSS 2) DCF = VSS when carrier amplitude at maximum; DCF = VDD when carrier amplitude is reduced (25% modulated) - the output is a current source/sink with |IOUT| > 5 A - at power down the output is high impedance 3) Pin 14 between quartz crystal filter pins must be connected to VSS to eliminate package leadframe parasitic capacitances disturbing the crystal filter performance. All other NC (Not Connected) pins are also recommended to be connected to VSS to minimize noise coupling. 4) See power down control logic table on page 2. - Internal pull-up resistor > 1M to VDD 5(6)
DA1017.002 29 May, 2002
ORDERING INFORMATION
Product Code MAS1017ATC1 MAS1017ATC1-1 Product AM-Receiver IC AM-Receiver IC Package Wafer, EWS-tested Dice on sticky tape Comments
wafer thickness 400 m wafer thickness 400 m, sawn wafer, tape ring 6", non UV tape, tape not expanded Please contact Micro Analog Systems Oy for other wafer thickness, sawn wafer delivery as well as SMD package options.
LOCAL DISTRIBUTOR
MICRO ANALOG SYSTEMS OY CONTACTS
Micro Analog Systems Oy Kamreerintie 2, P.O.Box 51 FIN-02771 Espoo, FINLAND Tel. +358 9 80 521 Fax +358 9 805 3213 http://www.mas-oy.com
NOTICE Micro Analog Systems Oy reserves the right to make changes to the products contained in this data sheet in order to improve the design or performance and to supply the best possible products. Micro Analog Systems Oy assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Micro Analog Systems Oy makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.
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